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Tuan Trong completes his thoughts on what he sees as the PowerPC problem: Last week Tuan covered basic concepts behind manufacturing, R & D, and the problems with being in the market minority with Part I of this editorial. This week Tuan makes suggestions for alternatives to the PowerPC for the Mac.
There are two problems to look at. They are both interrelated. One is the microprocessor company Apple buys its CPU and CPU subsystems from, and the other is the computer architecture Apple follows. My strategy is for Apple to team up with and or invest in a microprocessor company whose main, if not only, source of revenue is from desktop microprocessors, so that Apple would have more influence on it than as it would as just a buyer. Intimately related to this is the computer architecture Apple uses. It's essentially the same as x86 computer systems: microprocessors communicating with its subsystems on a shared memory and IO bus. Apple along with IBM and Motorola cannot compete with the x86 market's economies of scale, so simply cannot mimic the x86 computer architecture and expect to be cheaper, especially when they don't have a CPU and CPU subsystem that are prominently faster than what's available in the x86 market. A new architecture and strategy needs to be considered.
The architecture I would consider is like the following: a central computing module attached to a switched fabric based IO logic board. The central computing module would have a CPU with an embedded memory controller and an embedded graphics accelerator (or a vector unit that can emulate it), RAM, and Boot ROM. With the memory controller and graphics accelerator on the chip, it puts the bandwidth to and from CPU, graphics and memory at the performance limit. The CPU design can be any high performance CPU: PowerPC, MIPS, and even the PSX2's Emotion Engine. Something like this would require Apple to have a major influence on the microprocessor company; hence, the need for investment. The switched fabric IO is a serial link, packet switched IO bus architecture as opposed to the memory mapped shared PCI bus. It's performance is analogous to the differences between Fibre Channel or FireWire to SCSI. It can be found in various workstations and mainframes today. It will allow very easy hot swap, better streaming performance, and easy expansion. PCI will not be abandoned since it can be placed on one of the switched fabric links. Intel is slated to use a version of it for servers and high end workstations in a year or so.
To visualize better, look at the Apple Yosemite (the Blue Professional PowerMac G3) main logic board diagram and draw a line between the primary PCI bus and secondary PCI bus. Everything to the left of the secondary PCI bus is on this multichip central computing module. The advantage of this central computing module is that performance for CPU, graphics, memory, and some IO will increase automatically with clock rate increases. If a more versatile graphics option is preferred, a graphics bus can be built directly into the CPU's bus, similar to the current backside L2 cache in the PPC 750, allowing for very high bandwidth bus with very small latencies.
This strategy gives Apple a generational leap in computer architecture, and most important of all, much more control on the most important part of their computer systems. It's a promise heard before, but reality has disproven that optimism during the heady days of PowerPC's birth. Apple has already lived through a crisis like this with the Motorola 68k, it should take steps so that it doesn't repeat those mistakes again with PowerPC.
Tuan Trong is an Aerospace engineer (NASA employee) at NASA Johnson Space Center, Aeroscience and Flight Mechanics Division. He started at NASA as a coopertive education student starting in his Junior year of college and he became permanent in 1994 after graduation. He is currently working on X-38 vehicle aerodynamics. he even lived through the infamous JSC Mac-to-PC transition. |